PCB Design

PCB Design Guidelines for High-Speed Applications

High speed PCB design guidelines

High-speed signal designs tend to transfer low form factor, low power electronics, and faster and highly integrated signals. EMI problems tend to occur in high-speed signal design as the switching frequency is higher and more radiation happens across the PCB layers. This article introduces you to high speed PCB design guidelines.

Key Factors in High-Speed Signal Design

Regarding high speed PCB design guidelines, we must first focus on the main factors to be considered when designing high-speed signals, which mainly include the following:

Electromagnetic Interference and Compatibility

The first factor to focus on in high speed PCB design guidelines is EMI. EMI is nothing but electromagnetic energy that interferes with another electronic component or its path. This can also be a self-circuit disturbing noise. Electromagnetic compatibility of the device does not generate noise or has the ability to work without being interfered with by other electronic components.

Clock Signals

The second factor to focus on in high speed PCB design guidelines is the clock signal. The frequency domain of the clock signal is generally a square wave but it is very difficult to achieve and the signal going to peak voltage cannot be perfect square. The signal takes some time to reach the peak and come back to the fall state. This shape looks like a trapezoidal shape. Therefore the specification of driven devices should match the slew rate.

Transmission Line

The third factor to focus on in high speed PCB design guidelines is the transmission lines. Transmission lines are generally micro-strip or strip lines. Microstrip patch lines are the traces that are on the outer layers with one reference plane under it whereas strip lines are the ones with dielectric and ground planes on both sides. If the signal wavelength and length of the traces are the same then these considerations have to be taken on the transmission line. The main dimensions of the transmission line considerations are the length of the trace the width of the trace, the trace thickness, and dielectric thickness that a PCB designer should consider and for the circuit designer, the considerations are the wavelength, Velocity of the signal, a combination of several dielectrics and the frequency.

  • Signal Speed and Propagation Delay: The speed of the signal from source to destination is called signal speed. The propagation delay is nothing but the time taken by the signal to reach the destination, this is also dependent on the speed of the strip line. These are used in applications where the timing, differential pair signals, and clock skew requirements are needed.
  • Impedance: Another main factor of the transmission line is the characteristic impedance. The signal path or the signal change consists of a source, trace, vias, sync, or any connector. If the characteristic impedance changes, then the reflections happen on the transmission line. The sync has usually a high impedance input, therefore the following terminations are followed in PCB design. They are Series termination, Parallel termination, Thevenin termination, and AC termination.

Crosstalk

The fourth factor to focus on in PCB design guidelines for high speed is the crosstalk. The Interference between two parallel or nearby routed lines is called crosstalk. The source lines and victim lines are couples with capacitive or inductive coupling and it induces a forward or a reverse current in the victim’s trace. The crosstalk in the strip line environment tends to cancel each other whereas in the microstrip line, they tend to undergo capacitive coupling. To avoid cross-talk the adjacent traces are routed apart two times the width of the trace. Cross-talk in high-speed signal design can happen in two ways. The forward cross-talk traverses in the same direction as the source line as the length increases and the crosstalk increases concerning dV/dt. The reverse crosstalk increases when the amplitude is higher.

Differential Signals

The fifth factor to focus on in PCB design guidelines for high speed is the differential signals. Differential pairs of signals in each trace are equal but opposite in magnitude and opposite in direction. The Electromagnetic field tends to cancel each other concerning ground or reference path. To achieve this the trace length is equal to match the propagation delay. If the signal is radiated in both the traces then even the sensitive receiver does not identify it. This design constraint has to be matched by routing the traces close to each other.

Return Path

The sixth factor to focus on in PCB design guidelines for high speed is the return path. Any electrical circuit should always be in a closed loop to function. The position of the source, sync, trace of the signal line, return path, cut in-ground, split in-ground, bridging component, or connector can influence a lot of loop area and return path.

High-Speed Signal Routing Parameters

Differential Length Matching

In PCB design guidelines for high speed, differential length matching is a routing parameter that needs attention. Length matching for differential signals should be done to avoid or reduce the propagation delay. While the trace lengths also need to be matched in a particular way in the case of mismatched sources is important.

Differential Length Matching

In the case of these mismatched sources we need to match the length close to the source as a result of this the rest of the differential signals do not indulge in crosstalk for the remaining trace length.

 

Reference Ground Plane

In PCB design guidelines for high speed, reference ground plane is also a very important routing parameter. High-speed signals should be routed over a solid ground plane and never across any split or void ground or other potential ground planes.

void ground

Incorrect plane voids can result in various conditions like the excess emissions being radiated due to unbalanced current flow. The series inductance can cause unmatched further delays in propagation delay time. This flow can reduce the jitter and signal amplitude which can also cause interference in other adjacent signals.

As shown in the above image in the case of the complete ground split then it is recommended to use stitching capacitors as shown in the image below.

stitching capacitors

These capacitors should be 1uF or lesser than that which should be placed closer to the place crossing which minimizes the current loop area and discontinuity in impedance.

Planning stack-ups for ground planes is also important else they tend to bring in unwanted capacitance between the overlapping areas. As shown in the left side of the image below.

stack-ups for ground planes

The preferred layout is to not overlap any of them and provide sufficient routing for return paths.

Connecting USB or any other High-speed signal designs on the bottom layer if the connector is through the hole, is the ideal case. This is one way of mitigation technique to ensure that the through hole does not act as a stub. Hence the components are also ideally placed on the opposite or bottom layer.

If any high-speed signal is shifting layers, then the shift in the field also happens, to aid the shift in the field and to avoid distorted ground reference via are stitched on either side of the signal line for the path to flow with ease. Via stitching should be done symmetrically with less than a 200-mile gap. The image below shows the reference for one such case.

Via stitching

Differential Signal Spacing

In high speed board design guidelines, differential signal spacing is a routing parameter that cannot be ignored. The spacing constraints for the differential signal routing for similar signals and inter-differential signals are also equally important. This is determined by the trace width of the signal. The space between a signal to signal is 8mils if the signal trace width is 6 mil, in this case, the space for any keep-out signal is determined by 5 times the signal distance. In this case, we weed 30 mils in the inter-pair keep-out area. If any one of the signals is a high-speed signal or clock skew or periodic signal then 50 mils distance is kept for the safer side.

Differential Signal Spacing

Apart from all these signal routing constraints, we should not place or add any test points on top of the high-speed signal traces. Ensuring that high-speed signal designs are routed more than 100 miles away from the reference plane. Maintaining constant trace width after Ball grid array package (BGA) IC routing. Maximizing the differential pair-to-pair routing helps in proper isolation.

Symmetrical Routing

In high speed board design guidelines, symmetrical routing is a routing parameter that cannot be ignored. Maintaining symmetry in all high-speed differential pair signals without deviation is the key to controlling distortion. The image below shows the good and bad examples of symmetrical routing.

Symmetrical Routing

Increasing via’s anti-pad diameter decreases the capacitive and insertion loss, this should extend to routing on signal and plane layers as well. Equalizing via count on both terminals of differential signals is essential.

Coupling capacitor

In high speed layout guidelines,  coupling capacitor is also a routing parameter that has a big impact. Coupling capacitor placement and mitigation is to make sure that discontinuity does not happen and there is no negative effect on the signal. An example of AC coupling capacitors is shown below on how to maintain the ideal signal quality.

Coupling capacitor

Signal Bending and Spacing

In high speed layout guidelines, signal bending and spacing are routing parameters that we all need to pay attention to. Bending signal lines less than 90 degrees will cause sharp bends and reflection of signals, therefore all the high-speed signal lines are bent ideally at 135 degrees. The bent traces are generally 5X spaced than the trace width and the length of the bent edge is more than 1.5x times or more than that of the trace width.

Signal Bending and Spacing

ESD

In high speed layout guidelines,  the final routing parameter to focus on should be ESD. The electrostatic device protects the circuits from external ESD, the surge also comes through the connector. This device is placed closer to the connector. The filter circuits are kept right after the ESD circuit. A common mode Filter is used on signal lines where 0 Ohm 0402 packages are used, higher packages will cause more losses. All these traces, AC filter capacitors, CMF, and Protection devices are kept short and close to the terminal.

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