Views: 37 Author: Site Editor Publish Time: 2022-07-18 Origin: Site Inquire
Depending on their functionality, there are different types of vias that are drilled into a PCB.
The hole penetrates from the top layer to the bottom layer. They can be either PTH or NPTH. For PTH, the connection is established from the top to the bottom layer.
The hole penetrates from an exterior layer and ends at an interior layer. Here, the hole doesn’t penetrate through the entire board but connects the PCB’s exterior layers to at least one interior layer. Either the connection is from the top layer to a layer in the center or from the bottom layer to some layer in the interior region. The other end of the hole cannot be seen once the lamination is done. Hence, they are called blind vias.
These vias are located in the interior region of the PCB. The buried vias have no paths to the outer layers. They connect the inner layers and stay hidden from sight. As per IPC standards, buried vias and blind vias must be 6 mils (150 micrometers) in diameter or less.
The most commonly known vias are the microvias (µvias). During PCB manufacturing, microvias are drilled by lasers and have a smaller diameter compared to the standard through-hole vias. Microvias are generally implemented in High-Density Interconnection (HDI) PCBs. The depth of a microvia isn’t usually more than two layers deep since the plating of copper inside these small vias is a tedious task. The smaller the diameter of a via, the higher should be the throwing power of the plating bath to achieve electroless copper plating.
Microvias can be classified into stacked vias and staggered vias based on their location in the PCB layers.
Stacked vias are piled on top of one another in different layers.
Staggered vias are scattered in the different layers. And they are more expensive.
Additionally, there is another type of microvias called skipvias. Skipvias skip one layer, meaning, they pass through a layer making no electrical contact with that specific layer. The skipped layer will not form an electric connection with that via.
Microvias improve the electrical characteristics and also allow miniaturization for higher functionality in less space. This, in turn, makes room for large pin-count chips that can be found in smartphones and other mobile devices.
Microvias reduce the layer count in printed circuit board designs and enable higher routing density. This eliminates the need for through-hole vias. The microvias micro size and capabilities have successively increased processing power. The implementation of microvias instead of through-holes can reduce the layer count of PCBs and also ease the BGA breakout. Without microvias, you would still be using a big fat cordless phone instead of your sleek little smartphone.
The increasing signal speed, board component density, and PCB thickness have led to the implementation of via-in-pad. The PCB design (CAD design) engineers implement VIPPO along with the conventional via structures in order to achieve routability and signal integrity requirements.
In traditional vias, the signal trace is routed away from the pad and then to the via. You can see this in the above diagram. This is done to avoid seepage of the solder paste into the via during the reflow process. In a via-in-pad, the drilled via is present right below a pad. To be precise, the via is placed within the pad of a surface mount component.
First, the via is filled with non-conductive epoxy depending on the designer’s requirement. Later, this via is capped and plated to regain the land area. This technique shrinks the signal path lengths and as a result eliminates the parasitic inductance and capacitance effect.
The via-in-pad accommodates smaller component pitch sizes and shrinks the PCB’s overall size. This technology is ideal for BGA footprint components.
To make things better, back-drilling process is implemented along with the via-in-pad. The back drilling is performed to eliminate the signal reflections within the unused portion of the via. The unwanted via stub is drilled to remove any kind of signal reflection. This ensures signal integrity.
Here are a few quick tips that you can consider while employing vias in your design:
Use maximum micro via structures in your design.
Stacked and staggered vias: Choose staggered instead of stacked vias since the stacked vias need to be filled and planarized. This process is time consuming and expensive as well.
Keep the aspect ratio minimum. This provides better electrical performance and signal integrity. Lower noise and crosstalk, and lower EMI/RFI.
Implement smaller vias. This can help you build an efficient HDI PCB since the stray capacitance and inductance gets reduced.
Via-in-pads must be filled, unless they reside in thermal pads.
The pad matrix on which a BGA will be installed may include through vias and blind vias, but all of them must be filled and planarized, otherwise solder joints will be compromised.
Incorporate vias in the thermal pads under QFNs to help solder flow through to conductive planes.
The vias ensure a secure solder joint for the thermal pad and prevent solder from floating the package during assembly, which could hamper forming good solder joints at the QFN contacts.
An assembly shop can compensate for a lack of through vias in a thermal pad by adding windowpane-shaped opening in the solder paste stencil above the pad, to relieve solder pooling and outgassing during assembly, but the fix is less effective than if vias were present.
Check for minimum clearance of traces and vias from the routed/scored edges.
Check the position of vias for BGA packages.
Via-in-pad design requires filling.
Dog-bone design: Separate each via from its pad with a predefined short trace covered with solder mask. Ensure there is no mask clearance for the vias under BGA.
The board documentation should include a drill file with tool codes and X-Y coordinates for all holes.
The fab drawing should include a drill chart with hole symbols on the drawing and finished hole sizes along with via tolerances.
The Gerber files should include via plugging holes if required.
Controlled depth for blind and buried vias.
Tolerance:
Minimum outer layer annular ring: as per IPC standards
Minimum inner layer annular ring: as per IPC standards
Drill to plane clearance: 8 mils
Diameter: ± 3 mils preferred
Location: 1 mil
Registration: 1 mil
Via clearance of solder mask: 2.5 mils bigger than via pad size
Encroachment of solder mask onto via: via size + 3 mils
Anti-pad: 16 mils bigger than the hole size and plane relief preferred 8 mils
There may be requirements for fabricators to plug, fill, or tent vias on a PCB.
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